عنوان فارسی مقاله: | معماری کارامد اندازه متغیر HEVC 2D-DCT برای پایگاه هایFPGA |
| عنوان انگلیسی مقاله: |
Efficient architecture of variable size HEVC 2D-DCT for FPGA platforms |
چکیده
1.مقدمه
2. اثر مرتبط
2.1 الگوریتم DCT پایه
2.2 مولفه ها و ویژگی های سخت افزاری پایگاه FPGA
3. متدولوژی طراحی ارائه شده و معماری مدار
3.1 متدولوژی ارائه شده
3.2 طراحی معماری
4. نتایج و بحث اجرای سیستم
5.نتیجه گیری
کلمات کلیدی :
A low cost, constant throughput and reusable 8#x00D7;8 DCT ...ieeexplore.ieee.org/document/7869994/by S Chatterjee - 2016The minimum and the maximum Transform Unit (TU) size used in HEVC is 4 × 4 and 32 × 32, respectively. ... The proposed architecture is implemented on FPGA platform. The 1D DCT architecture operates at 183.3 MHz, whereas 2D DCT ...[PDF]Variable Size 2D DCT with FPGA Implimentation - ijritccwww.ijritcc.org/download/browse/Volume_5.../1495790272_26-05-2017.pdfMay 26, 2017 - Variable Size 2D DCT with FPGA Implementation. Monika Rani ... based on FPGA platform of the virtex-5 family is used to validate the operation of the defined DCT device. .... Chen” Efficient architecture of variable size HEVC.Efficient architecture of variable size HEVC 2D-DCT for FPGA platformshttps://www.sparrho.com/item/efficient...of...hevc-2d-dct-for-fpga-platforms/b997d1/Publication date: March 2017 Source:AEU - International Journal of Electronics and Communications, Volume 73 Author(s): Min Chen, Yuanzhi Zhang, Chao.Zhang Yuanzhi - Google Scholar Citationsscholar.google.com/citations?user=41_Qrb8AAAAJ&hl=enEfficient architecture of variable size HEVC 2D-DCT for FPGA platforms. M Chen, Y Zhang, C Lu. AEU-International Journal of Electronics and Communications ...Efficient architecture of variable size HEVC 2D-DCT for FPGA platformshttps://www.terkko.helsinki.fi/.../15977454_efficient-architecture-o...Translate this pageEfficient architecture of variable size HEVC 2D-DCT for FPGA platforms. Added 105 days ago (04.01.2017). Journal: International Journal of Electronics and ...Most Downloaded AEÜ - International Journal of Electronics and ...https://www.journals.elsevier.com/aeu-international...of.../most-downloaded-articlesEfficient architecture of variable size HEVC 2D-DCT for FPGA platforms ... A blind DCT based color watermarking algorithm for embedding multiple watermarks.